Fiscal Year	2011
Division	Graduate School of Engineering & Applied Science
Department	Electrical & Computer Engineering
Investigator(s)	Fouts, Douglas J.
Sponsor	Office of Naval Research (Navy)
Summary	To work collaboratively with NASA/JPL and NSWC-Crane to develop applications for new microelectronic anti-tamper technology that has recently been develop at JPL, with emphasis on military electronic systems that utilize ASICs (Applications Specific Integrated Circuits) and/or FPGAs (Field Programmable Gate Arrays).
Keywords
Publications	Publications, theses (not shown) and data repositories will be added to the portal record when information is available in FAIRS and brought back to the portal
Data	Publications, theses (not shown) and data repositories will be added to the portal record when information is available in FAIRS and brought back to the portal