Research Summaries

Back Development of Reconfigurable Computing Applications

Fiscal Year 2007
Division Graduate School of Engineering & Applied Science
Department Electrical & Computer Engineering
Investigator(s) Butler, Jon T.
Sponsor National Security Agency (Other-Fed)
Summary We are currently investigating the use of a lookup table (LUT) cascade to realize high-speed high-accuracy numeric functions. Such functions are useful in digital signal processing, rendering graphics displays, and accelerating CPU operations. The end product of our work is an architecture that achieves some specified accuracy on a given function. A characterizing feature is that the architecture is combinational; i.e. computation occurs within a single clock cycle. Our method is adaptable to a wide variety of functions, including complex compositions of elementary and non-elementary functions.
Keywords
Publications Publications, theses (not shown) and data repositories will be added to the portal record when information is available in FAIRS and brought back to the portal
Data Publications, theses (not shown) and data repositories will be added to the portal record when information is available in FAIRS and brought back to the portal